| Item type |
デフォルトアイテムタイプ_（フル）(1) |
| 公開日 |
2023-03-18 |
| タイトル |
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タイトル |
NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability |
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言語 |
en |
| 作成者 |
Nakajima, Anri
Khosru, Quazi Deen Mohd
Yoshimoto, Takashi
Kidera, Toshirou
Yokoyama, Shin
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| アクセス権 |
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アクセス権 |
open access |
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アクセス権URI |
http://purl.org/coar/access_right/c_abf2 |
| 権利情報 |
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権利情報 |
Copyright (c) 2002 American Institute of Physics. |
| 内容記述 |
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内容記述 |
Extremely thin (equivalent oxide thickness, Teq = 1.2 nm) silicon-nitride high-k (er = 7.2) gate dielectrics have been formed at low temperatures (<550 °C) by an atomic-layer-deposition (ALD) technique with subsequent NH3 annealing at 550 °C. A remarkable reduction in leakage current, especially in the low dielectric voltage region, which will be the operating voltage for future technologies, has made it a highly potential gate dielectric for future ultralarge-scale integrated devices. Suppressed soft breakdown events are observed in ramped voltage stressing. This suppression is thought to be due to a strengthened structure of Si–N bonds and the smoothness and uniformity at the poly-Si/ALD-silicon-nitride interface. |
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言語 |
en |
| 出版者 |
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出版者 |
American Institute of Physics |
| 言語 |
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言語 |
eng |
| 資源タイプ |
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資源タイプ識別子 |
http://purl.org/coar/resource_type/c_6501 |
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資源タイプ |
journal article |
| 出版タイプ |
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出版タイプ |
VoR |
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出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| 関連情報 |
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識別子タイプ |
DOI |
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関連識別子 |
10.1063/1.1447314 |
| 関連情報 |
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識別子タイプ |
DOI |
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関連識別子 |
http://dx.doi.org/10.1063/1.1447314 |
| 収録物識別子 |
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収録物識別子タイプ |
ISSN |
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収録物識別子 |
0003-6951 |
| 収録物識別子 |
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収録物識別子タイプ |
NCID |
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収録物識別子 |
AA00543431 |
| 開始ページ |
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開始ページ |
1252 |
| 書誌情報 |
Applied Physics Letters
Applied Physics Letters
巻 80,
号 7,
p. 1252-1254,
発行日 2002-02-18
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| 旧ID |
18588 |
ApplPhysLett_80_1252.pdf (116.0 KB)
