{"created":"2025-02-21T03:15:55.473579+00:00","id":2006267,"links":{},"metadata":{"_buckets":{"deposit":"3a260867-7cf1-41a5-a453-f6a120205e0a"},"_deposit":{"created_by":41,"id":"2006267","owners":[41],"pid":{"revision_id":0,"type":"depid","value":"2006267"},"status":"published"},"_oai":{"id":"oai:hiroshima.repo.nii.ac.jp:02006267","sets":["1730444907710"]},"author_link":[],"item_1617186331708":{"attribute_name":"Title","attribute_value_mlt":[{"subitem_title":"NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability","subitem_title_language":"en"}]},"item_1617186419668":{"attribute_name":"Creator","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Nakajima, Anri","creatorNameLang":"en"}],"familyNames":[{"familyName":"Nakajima","familyNameLang":"en"}],"givenNames":[{"givenName":"Anri","givenNameLang":"en"}]},{"creatorNames":[{"creatorName":"Khosru, Quazi Deen Mohd","creatorNameLang":"en"}],"familyNames":[{"familyName":"Khosru","familyNameLang":"en"}],"givenNames":[{"givenName":"Quazi Deen Mohd","givenNameLang":"en"}]},{"creatorNames":[{"creatorName":"Yoshimoto, Takashi","creatorNameLang":"en"}],"familyNames":[{"familyName":"Yoshimoto","familyNameLang":"en"}],"givenNames":[{"givenName":"Takashi","givenNameLang":"en"}]},{"creatorNames":[{"creatorName":"Kidera, Toshirou","creatorNameLang":"en"}],"familyNames":[{"familyName":"Kidera","familyNameLang":"en"}],"givenNames":[{"givenName":"Toshirou","givenNameLang":"en"}]},{"creatorNames":[{"creatorName":"Yokoyama, Shin","creatorNameLang":"en"}],"familyNames":[{"familyName":"Yokoyama","familyNameLang":"en"}],"givenNames":[{"givenName":"Shin","givenNameLang":"en"}]}]},"item_1617186476635":{"attribute_name":"Access Rights","attribute_value_mlt":[{"subitem_access_right":"open access","subitem_access_right_uri":"http://purl.org/coar/access_right/c_abf2"}]},"item_1617186499011":{"attribute_name":"Rights","attribute_value_mlt":[{"subitem_rights":"Copyright (c) 2002 American Institute of Physics."}]},"item_1617186626617":{"attribute_name":"Description","attribute_value_mlt":[{"subitem_description":"Extremely thin (equivalent oxide thickness, Teq = 1.2 nm) silicon-nitride high-k (er = 7.2) gate dielectrics have been formed at low temperatures (<550 °C) by an atomic-layer-deposition (ALD) technique with subsequent NH3 annealing at 550 °C. A remarkable reduction in leakage current, especially in the low dielectric voltage region, which will be the operating voltage for future technologies, has made it a highly potential gate dielectric for future ultralarge-scale integrated devices. Suppressed soft breakdown events are observed in ramped voltage stressing. This suppression is thought to be due to a strengthened structure of Si–N bonds and the smoothness and uniformity at the poly-Si/ALD-silicon-nitride interface.","subitem_description_language":"en"}]},"item_1617186643794":{"attribute_name":"Publisher","attribute_value_mlt":[{"subitem_publisher":"American Institute of Physics"}]},"item_1617186702042":{"attribute_name":"Language","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_1617186920753":{"attribute_name":"Source Identifier","attribute_value_mlt":[{"subitem_source_identifier":"0003-6951","subitem_source_identifier_type":"ISSN"},{"subitem_source_identifier":"AA00543431","subitem_source_identifier_type":"NCID"}]},"item_1617187024783":{"attribute_name":"Page Start","attribute_value_mlt":[{"subitem_start_page":"1252"}]},"item_1617187056579":{"attribute_name":"Bibliographic Information","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2002-02-18","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"7","bibliographicPageEnd":"1254","bibliographicPageStart":"1252","bibliographicVolumeNumber":"80","bibliographic_titles":[{"bibliographic_title":"Applied Physics Letters"},{"bibliographic_title":"Applied Physics Letters"}]}]},"item_1617258105262":{"attribute_name":"Resource Type","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_1617265215918":{"attribute_name":"Version Type","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_1617353299429":{"attribute_name":"Relation","attribute_value_mlt":[{"subitem_relation_type_id":{"subitem_relation_type_id_text":"10.1063/1.1447314","subitem_relation_type_select":"DOI"}},{"subitem_relation_type_id":{"subitem_relation_type_id_text":"http://dx.doi.org/10.1063/1.1447314","subitem_relation_type_select":"DOI"}}]},"item_1617605131499":{"attribute_name":"File","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_access","date":[{"dateType":"Available","dateValue":"2023-03-18"}],"displaytype":"simple","filename":"ApplPhysLett_80_1252.pdf","filesize":[{"value":"116.0 KB"}],"mimetype":"application/pdf","url":{"objectType":"fulltext","url":"https://hiroshima.repo.nii.ac.jp/record/2006267/files/ApplPhysLett_80_1252.pdf"},"version_id":"5086cf1b-e6b6-4ebb-98df-ae5123aa1a04"}]},"item_1732771732025":{"attribute_name":"旧ID","attribute_value":"18588"},"item_title":"NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability","item_type_id":"40003","owner":"41","path":["1730444907710"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2023-03-18"},"publish_date":"2023-03-18","publish_status":"0","recid":"2006267","relation_version_is_last":true,"title":["NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability"],"weko_creator_id":"41","weko_shared_id":-1},"updated":"2025-02-21T07:05:40.750763+00:00"}