| Item type |
デフォルトアイテムタイプ_（フル）(1) |
| 公開日 |
2023-03-18 |
| タイトル |
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|
タイトル |
Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires |
|
言語 |
en |
| 作成者 |
Yokoyama, Shin
Ohba, Kenji
Kawamura, Kensaku
Kidera, Toshiro
Nakajima, Anri
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| アクセス権 |
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アクセス権 |
open access |
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アクセス権URI |
http://purl.org/coar/access_right/c_abf2 |
| 権利情報 |
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|
権利情報 |
Copyright (c) 2001 American Institute of Physics. |
| 内容記述 |
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内容記述 |
The low-temperature (410 °C) selective deposition of Si on silicon nitride has been achieved by means of the time-modulated flow of disilane while a very small amount of Si is deposited on SiO2. Very narrow (21 nm width and 28 nm thick) Si wires have been fabricated using the selective deposition. The resistivity of the Si wires fabricated by the selective deposition is much smaller (∼1/5) than that fabricated by the conventional reactive ion etching followed by annealing. This technique will be applicable to the formation of a polycrystalline silicon gate with small resistivity for the high-performance ultrasmall metal–oxide–semiconductor transistors and quantum effect devices. |
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言語 |
en |
| 出版者 |
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出版者 |
American Institute of Physics |
| 言語 |
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|
言語 |
eng |
| 資源タイプ |
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資源タイプ識別子 |
http://purl.org/coar/resource_type/c_6501 |
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資源タイプ |
journal article |
| 出版タイプ |
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|
出版タイプ |
VoR |
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出版タイプResource |
http://purl.org/coar/version/c_970fb48d4fbd8a85 |
| 関連情報 |
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|
識別子タイプ |
DOI |
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関連識別子 |
10.1063/1.1387260 |
| 関連情報 |
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|
識別子タイプ |
DOI |
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|
関連識別子 |
http://dx.doi.org/10.1063/1.1387260 |
| 収録物識別子 |
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収録物識別子タイプ |
ISSN |
|
収録物識別子 |
0003-6951 |
| 収録物識別子 |
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収録物識別子タイプ |
NCID |
|
収録物識別子 |
AA00543431 |
| 開始ページ |
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|
開始ページ |
494 |
| 書誌情報 |
Applied Physics Letters
Applied Physics Letters
巻 79,
号 4,
p. 494-496,
発行日 2001-07-23
|
| 旧ID |
18584 |
ApplPhysLett_79_494.pdf (167.6 KB)
